OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform.
About the Role
OpenAI's Hardware organization builds supercompute platforms from silicon and boards to full rack-scale systems to power advanced AI workloads. This role owns end-to-end quality for high-speed interconnect hardware across the product lifecycle: early design influence, supplier/contract manufacturer readiness, qualification, ramp, and fleet quality in lab and data center environments.
You will be the quality lead for advanced interconnect components and assemblies, including high-speed copper cables, cable cartridges, patch panels, backplane/cable-backplane solutions, high-speed connectors, and related electro-mechanical interfaces. You will partner closely with electrical, mechanical, SI/PI, systems, reliability, operations, and external vendors to prevent escapes and drive rapid, data-driven containment and corrective action.
In this role you will:
Own quality for advanced interconnect components and assemblies: high-speed connectors, high-speed copper cables, cable cartridges (e.g., cable cassette style assemblies), patch panels & optics, and backplane/cable-backplane interconnect solutions.
Drive quality-by-design: participate in design reviews, DFM/DFx, tolerance stacks, material and plating selections, connector mating strategy, strain relief, and assembly methods to reduce variation and field failures.
Define and track quality and reliability metrics (DPPM, yield, escapes, RMA/FRACAS trends, Cpk/Ppk where applicable) for interconnects across NPI and mass production.
Build and execute qualification strategies for cables/connectors/patch panels (mechanical, environmental, electrical, and reliability), including test coverage, sample plans, clear pass/fail criteria, defining installation criteria and processes, optics termination quality management and setting fiber standards criteria.
Partner with engineering and operations to drive smooth ramp: risk assessments, pilot build learnings, change control, and readiness reviews (EVT/DVT/PVT/MP or equivalent phases).
Own supplier and CM performance management: scorecards, audits (process and quality system), and follow-up to close findings with verified effectiveness
Work with suppliers to improve manufacturing throughput, stability, and yields for cable and connector assembly processes (e.g., wire prep, welding/crimping, overmolding/injection molding, plating, and assembly fixturing).
Lead rapid containment and root-cause investigations for failures found during bring-up, system integration tests, reliability testing, and fleet deployments.
Own the end-to-end corrective action process (8D, 5-Whys, Ishikawa, DOE as needed): define problem statements, isolate variables, validate root cause, implement fixes, and verify effectiveness.
Partner with SI/PI and test teams to correlate electrical performance issues (e.g., link margin, BER, eye closure, impedance discontinuities, PAM4, TDR and VNA) with manufacturing and mechanical drivers (connector wear, plating, contamination, misalignment, cable routing, assembly variation).
Support integration and deployment of OpenAI supercompute racks in lab and data center environments; identify quality risks tied to shipping, handling, installation, and service operations.
You might thrive in this role if you:
7+ years of experience in quality engineering, manufacturing quality, supplier quality, or reliability for interconnects or high-speed hardware used in servers, networking, storage, or high-performance compute systems.
Hands-on experience with high-speed copper interconnect products: connectors and/or cable assemblies; familiarity with patch panels or backplane/cable-backplane solutions is a plus
Strong command of problem-solving and quality tools: 8D, 5-Whys, Fishbone, PFMEA/control plans, SPC/MSA (gauge R&R), and change control.
Ability to read and interpret mechanical drawings, GD&T basics, and electrical/interface specifications; comfortable working across ME/EE/SI disciplines.
Clear written and verbal communication skills; ability to drive alignment across internal teams and external partners.
Experience with cable manufacturing and assembly processes (wire treatment, resistance welding/laser welding, crimping, overmolding/injection molding, braiding/shielding, plating, and automated test).
Experience with optical interconnects (AOC/DAC, pluggable modules such as QSFP/OSFP), fiber termination quality, optical return loss, end-face inspection standards (IEC 61300), and contamination control practices.
Ability to travel internationally and work effectively across time zones with ODM/JDM and supplier partners.
To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.
For additional information, please see OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement https://cdn.openai.com/policies/eeo-policy-statement.pdf.
Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.
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